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DE2_70_D5M_LTM_NIOS_capture.zi
- 本文提供一個CMOS Controller，讓Nios II可以藉由CMOS Controller控制CMOS，並能讀出CMOS放在SDRAM中的影像。运行在DE2-70平台上,This article provides a CMOS Controller, so that Nios II can take advantage of CMOS Controller control CMOS, and allowed to deliver on the SDRAM in the CMOS imag
udp_pack
- Nios II打包程序，通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM，再用UDP打包进行以太网传输-Nios II pack
hello_world_sgdma
- NIOS II下调试通过的scatter-gather DMA从SDRAM 到 片内RAM的C代码-NIOS II debugging adopted under the scatter-gather DMA from SDRAM to the chip RAM of the C code
nios_ram
- nios 中读写sdram的程序，适用于epc2 cyclone二代FPGA板子-Nios SDRAM read and write the procedures applicable to epc2 cyclone II FPGA board
tut_DE2_sdram_vhdl
- This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
first_cpu
- nios ii cpu核，包含通用IO口、sdram、flash、uart-nios ii cpu、genernal io port、sdram、falsh、uart
udp_pack_nios
- Nios II打包程序，通过DMA把接到AVALON从接口的双口RAM数据传到片外的SDRAM，再用UDP打包进行以太网传输-Nios II pack
nios2sdram
- 使用Nios II测试SDRAM的完整工程。下载修改器件及引脚分配编译后可直接运行。使用quartus9.1+NiosII9.1-SDRAM using the Nios II tests the integrity of works. Download the change device and pin assignment can be directly compiled to run. Use quartus9.1+ NiosII9.1
FLASH_SDRAM
- 利用QUARTUS II的SOPC设计的Nios II系统，检测Flash模块和SDRAM模块是否可用。对于设计之前的模块检测有一定参考价值。-Use of QUARTUS II of the Nios II system, SOPC designs, testing Flash module and SDRAM module is available. Prior to testing for the design of the modules have a certain reference
SDRAM
- 连接Nios II 和SDRAM的系统设计，DDR SDRAM设计及调试经验总结，MT48LC16M16资料。-failed to translate
DDR SDRAM Design Tutorials
- Altera公司的基于NIOSII设计DDR和DDR2内存的资料，很有帮助的，-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
nios_shi
- 由nios ii实现的，用cfi flash与SDRAM共同实现的电子数字时钟，基于sopc的嵌入式代码，所用软件都是9.0版本的，包括quartus ii9.0 和nios ii9.0-Achieved by the nios ii, together with the cfi flash with SDRAM to achieve the electronic digital clock, based on sopc embedded code, the software is versio
SDRAMPNIOS-II
- 带SDRAM的nios II系统，开发环境为Quartus II 9.0 + Nios II 9.0-With the nios II SDRAM system, development environment for the Quartus II 9.0+ Nios II 9.0
ECE-SOPC_SDRAM
- FPGA NIOS II 对SDRAM的读写操作,实验验证通过,可放心使用.-The FPGA the NIOS II to SDRAM read and write operations, experimental verification is passed, can be freely used.
FA161-SCH
- 联华众科FPGA开发板FA161核心器件为 Altera Cyclone系列FPGA EP1C6，FA161板载有SDRAM，SRAM，FLASH方便制作各种应用，开发板所带资料中包括了上位机与开发板USB通信，上位机与开发板以太网通信，上位机与开发板串口通信例程。FA161板载有USB 1.1，USB 2.0(CY7C68013A)接口，以太网接口(RTL8019AS)。FA161上可以进行HDL程序开发，可以进行nios ii程序开发，可以结合MATLAB制作DSP Builder应用。FA
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
DE0_NANO_SDRAM_Nios_Test
- SDRAM Test by Niios II Many applications use SDRAM to provide temporary storage. In this demonstration hardware and software designs are provided to illustrate how to perform memory access in QSYS. We describe how the Altera’s SDRAM Controller IP is
SDRAM
- 基于FPGA的nios ii嵌入式SDRAM应用开发程序，仅供参考学习使用，谢谢。-NIOS based on the II FPGA embedded SDRAM application development process, only reference learning to use, thank you.
CoreCourse_GHRD_第二课
- 这是小梅哥qsys第二课的源码包。这些资料提供给大家学习交流之用。(Processor nios2 Nios II 13.0 All Components nios2 altera_nios2_qsys 13.0 sdram altera_avalon_new_sdram_controller 13.0.1 uart_0 altera_avalon_uart 13.0.1 pio_led altera_avalon_pio 13.0.1
A15_SDRAM_100M_HZ
- 基于Nios II的SDRAM控制设计，包括工程、程序以及仿真。(The design of SDRAM control based on Nios II, including engineering, program and simulation.)